This paper introduces a novel networking strategy for RAM-based neurons which significantly improves the training and recognition performance of such networks whilst maintaining the generalization capabilities achieved in previous network configurations. A number of different architectures are introduced, each using the same underlying principles. Initially, features which are common to all architectures are described, illustrating the basis of the underlying paradigm. Three architectures are then introduced illustrating different techniques of employing the paradigm to meet differing performance specifications. The architectures are described in terms of the structure of the neurons they employ. Details of the various training and recognition algorithms employed by the architectures are supplied in order to present a complete description of the operation of this class of artificial neural network.